Intel plans to launch a chip that will have 1,000 billion transistors by the year 2030.
Pat Gelsinger, the CEO of Intel, recently stated that Moore's Law is still relevant and that the company intends to produce chips containing 1,000 billion transistors in the next 7 years. Moore's Law, which was first introduced by Gordon Moore, co-founder of Intel in 1965, states that the number of transistors on integrated circuits would double every year, but it was later adjusted to an 18-month cycle. This concept is the foundation for the definition that doubling the number of transistors results in a CPU performance increase over the same period.
Gelsinger mentioned that the death of Moore's Law may be true, but not yet. Things are much harder now, and we are no longer in the golden age of Moore's Law. Despite the challenges, Gelsinger believes that the concept may still hold true over a longer period of about three years. Furthermore, the number of transistors on a chip plays an essential role in determining its power and energy efficiency.
For instance, the A13 Bionic chip in the iPhone 11 series released in 2019 is equipped with 8.5 billion transistors, while the 3 nm A17 Pro chip on the iPhone 15 Pro and 15 Pro Max has 19 billion transistors, resulting in higher performance and lower power consumption. On the other hand, AMD's most potent chip, MI300X, designed for training AI will be released at the end of 2023, containing 153 billion mosfets (field-effect transistors).
Intel is now moving towards a new concept known as "Super Moore's Law" or Moore's Law 2.0. The company aims to create chips that contain 1,000 billion transistors by 2030 using 2.5D and 3D chip packaging technology, which helps increase transistors without enlarging the chip size. The new packaging technology, RibbonFET, is an architecture with transistors covering many sides that reduces the leakage of current transmitted between the components. This technology is similar to Gate-All-Around that Samsung Foundry uses on its 3 nm chip production process.
The second element that will be available on Intel's trillion-transistor chips by 2030 is PowerVIA technology, in which power supply lines are placed on the back of the chip, improving power and performance. Intel has also created new process nodes that help reduce transistor size. Finally, there is the 3D chip packaging process, with 16 layers of integrated circuits stacked to form a single chip.
Currently, Intel is behind other chip foundries like TSMC or Samsung Foundry, as both have produced 3 nm chips, whereas Intel is still in the 5 nm process. However, all three companies are racing to produce 2 nm chips by 2025. By 2032, they are expected to produce 1 nm chips.
Speaking about the semiconductor field, Gelsinger also mentioned that the cost of building a factory has increased significantly over the years. "If a modern factory was built 7 or 8 years ago, it would have cost about 10 billion USD. Now, this number is 20 billion USD," he added.
According to Nikkei Asia, the total capital spending of TSMC, Intel, and Samsung Electronics in 2022 is more than 97 billion USD, double the amount the EU plans to use to develop the chip sector in the next decade. Handel Jones, a semiconductor veteran and CEO of chip consulting firm International Business Strategies, stated that costs are slowing things down. In the past, TSMC applied new technology every two years, but now it's every three years, and the future could be longer.
Gelsinger mentioned that the death of Moore's Law may be true, but not yet. Things are much harder now, and we are no longer in the golden age of Moore's Law. Despite the challenges, Gelsinger believes that the concept may still hold true over a longer period of about three years. Furthermore, the number of transistors on a chip plays an essential role in determining its power and energy efficiency.
For instance, the A13 Bionic chip in the iPhone 11 series released in 2019 is equipped with 8.5 billion transistors, while the 3 nm A17 Pro chip on the iPhone 15 Pro and 15 Pro Max has 19 billion transistors, resulting in higher performance and lower power consumption. On the other hand, AMD's most potent chip, MI300X, designed for training AI will be released at the end of 2023, containing 153 billion mosfets (field-effect transistors).
Intel is now moving towards a new concept known as "Super Moore's Law" or Moore's Law 2.0. The company aims to create chips that contain 1,000 billion transistors by 2030 using 2.5D and 3D chip packaging technology, which helps increase transistors without enlarging the chip size. The new packaging technology, RibbonFET, is an architecture with transistors covering many sides that reduces the leakage of current transmitted between the components. This technology is similar to Gate-All-Around that Samsung Foundry uses on its 3 nm chip production process.
The second element that will be available on Intel's trillion-transistor chips by 2030 is PowerVIA technology, in which power supply lines are placed on the back of the chip, improving power and performance. Intel has also created new process nodes that help reduce transistor size. Finally, there is the 3D chip packaging process, with 16 layers of integrated circuits stacked to form a single chip.
Currently, Intel is behind other chip foundries like TSMC or Samsung Foundry, as both have produced 3 nm chips, whereas Intel is still in the 5 nm process. However, all three companies are racing to produce 2 nm chips by 2025. By 2032, they are expected to produce 1 nm chips.
Speaking about the semiconductor field, Gelsinger also mentioned that the cost of building a factory has increased significantly over the years. "If a modern factory was built 7 or 8 years ago, it would have cost about 10 billion USD. Now, this number is 20 billion USD," he added.
According to Nikkei Asia, the total capital spending of TSMC, Intel, and Samsung Electronics in 2022 is more than 97 billion USD, double the amount the EU plans to use to develop the chip sector in the next decade. Handel Jones, a semiconductor veteran and CEO of chip consulting firm International Business Strategies, stated that costs are slowing things down. In the past, TSMC applied new technology every two years, but now it's every three years, and the future could be longer.
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